5 commits

Author	SHA1	Message	Date
Camille Monière	25255802f1	Remove indetermination and patch for Xilinx v2019.1 compatibility ... - Use of `rom_cordic_rotate` namespace to isolate functions and variables. Useful when CORDICS are included in super project. - Add define barrier to exclude some code when used when Xilinx v2019.1, especially C++11/14 code that are not fully supported by the (crazy) old version of GCC in use (v4.6.3). Need the definition of `XILINX_MAJOR` (can be done using `set XILINX_MAJOR [expr {int( [version -short] )}]` in a Xilinx TCL script and then adding it to the cflags using the `-cflags` switch with `-DXILINX_MAJOR=${XILINX_MAJOR}` or by manually adding the major version to the CFLAGS in gui. - Add a template version of the helper function, to support v2019.1.	2022-04-25 11:43:31 +02:00
Camille Monière	0dc041b840	Fix test method to really using test vectors ... - Grow kn_i to 4 bits to pass the new tests.	2022-04-14 17:19:19 +02:00
Camille Monière	7707d12e98	Add a synthesis-friendly option and yet another formatting ... - If ENABLE_SOFTWARE is true, the behavior is the same than before. All tests and functions relying on std::complex are obfuscated otherwise. This is required for Xilinx tools.	2022-03-14 17:55:16 +01:00
Camille Monière	f0035238bf	Correct the name and improve widely ... - Fix the MC (Monte-Carlo) to the proper algoritm name, ML (maximum likelyhood) and remove HalfPi since the use of divider allow to theoretically support any pi / 2^k, k an integer. In reality, a too low rotation would require more stages than 7 but it is for futur improvements. - Make use of `divider` template to provide rotation grain finer than pi / 2. Validated (unit-tested) with pi / 4 with the same margins than pi / 2 (2% of error with floating scaling, 3% with fixed scaling). - Fix rom size which now use N_STAGES+1 bits instead of 8 regardless of N_STAGES. Simplify the cordic method implementation, which unexpectedly (and fortunately) improved its performance.	2022-03-14 14:07:10 +01:00
Camille Monière	5bc9c3eeb1	Big update, that compiles with Xilinx GCC 6.2 ... - Commit title implies possible Xilinx Vivado HLS 2019.1 support, thus support for e.g. all USRP Series 3 from Ettus. - Add a new CORDIC version, Rom based and meta-programmed via CMake features, to be even compiled with earlier GCC (not quite tested, but by changing constexpr to const and using gcc 4.6 -sdt=c++0x, it worked). - Class name modified, to be more explicit.	2022-02-18 21:33:59 +01:00