Enable support of GNU v4.6 and (consequently) of Vivado HLS 2019.1

- Also disable TCL unit COSIM test. Can be enable by turning 'true' to
  false in the CMakeLists,
- v4.6 doesn't support C++14, nor some C++11, so some hacky ways have
  been found. Unit test has been updated but still works and coverage is
  good (94%, the 6% beeing exeption handling, unrelevant in HLS).
This commit is contained in:
DrasLorus 2022-05-16 19:02:23 +02:00
parent 7844c3bdd1
commit d9f80fc165
Signed by: moniere
GPG key ID: 188DD5B072181C0F
5 changed files with 162 additions and 180 deletions

View file

@ -25,15 +25,23 @@ project (
) )
if ((CMAKE_CXX_COMPILER_ID STREQUAL "GNU") AND (CMAKE_CXX_COMPILER_VERSION VERSION_LESS 6.2)) if ((CMAKE_CXX_COMPILER_ID STREQUAL "GNU") AND (CMAKE_CXX_COMPILER_VERSION VERSION_LESS 6.2))
message ( # message ( FATAL_ERROR "This project require a GNU compiler version greater than 6.2." "\nNote:
FATAL_ERROR # If you tried to use g++-4.6.3 as provided by Xilinx Vivado v2019.1, use directly the TCL script
"This project require a GNU compiler version greater than 6.2." # " "in the folder `hls_files/cordicabs_16_4_6`." )
"\nNote: If you tried to use g++-4.6.3 as provided by Xilinx Vivado v2019.1, use directly the TCL script " set (IS_GNU_LEGACY ON)
"in the folder `hls_files/cordicabs_16_4_6`." else ()
) set (IS_GNU_LEGACY OFF)
endif () endif ()
set (CMAKE_CXX_STANDARD 14) if (IS_GNU_LEGACY)
set (CMAKE_CXX_STANDARD 11)
message (
WARNING
"An old GNU compiler is currently used, Catch2, C++14 and advanced C++11 features are disabled."
)
else ()
set (CMAKE_CXX_STANDARD 14)
endif ()
set (CMAKE_CXX_STANDARD_REQUIRED ON) set (CMAKE_CXX_STANDARD_REQUIRED ON)
set (CMAKE_CXX_EXTENSIONS OFF) set (CMAKE_CXX_EXTENSIONS OFF)
@ -63,6 +71,7 @@ option (ENABLE_SOFTWARE
) )
option (PEDANTIC "use -Wall and -pedantic." ON) option (PEDANTIC "use -Wall and -pedantic." ON)
option (ENABLE_GCOV "use GCOV and LCOV to assess code coverage." OFF)
# ################################################################################################## # ##################################################################################################
@ -70,6 +79,16 @@ if (PEDANTIC)
add_compile_options (-Wall -pedantic) add_compile_options (-Wall -pedantic)
endif () endif ()
if (ENABLE_GCOV)
add_compile_options (
-O0
-fprofile-arcs
-ftest-coverage
-fprofile-abs-path
)
add_link_options (-lgcov --coverage)
endif ()
if (EXPORT_COMMANDS) if (EXPORT_COMMANDS)
set (CMAKE_EXPORT_COMPILE_COMMANDS ON) set (CMAKE_EXPORT_COMPILE_COMMANDS ON)
endif () endif ()
@ -82,7 +101,7 @@ if (ENABLE_XILINX)
) )
set ( set (
XILINX_VER XILINX_VER
"2020.2" "2019.1"
CACHE STRING "Xilinx software version to use." CACHE STRING "Xilinx software version to use."
) )
@ -96,9 +115,15 @@ if (ENABLE_XILINX)
XILINX_HLS vitis_hls HINTS ${XILINX_HOME}/Vitis_HLS/${XILINX_VER}/bin NO_CACHE REQUIRED XILINX_HLS vitis_hls HINTS ${XILINX_HOME}/Vitis_HLS/${XILINX_VER}/bin NO_CACHE REQUIRED
) )
else () else ()
message ( # message ( FATAL_ERROR "Xilinx versions less than 2020.1 are not supported due to the outdated
FATAL_ERROR # compiler version in use" )
"Xilinx versions less than 2020.1 are not supported due to the outdated compiler version in use" set (
AP_INCLUDE_DIR
${XILINX_HOME}/Vivado/${XILINX_VER}/include
CACHE INTERNAL "Path to Xilinx includes" FORCE
)
find_program (
XILINX_HLS vivado_hls HINTS ${XILINX_HOME}/Vivado/${XILINX_VER}/bin NO_CACHE REQUIRED
) )
endif () endif ()
message (STATUS "AP headers must lie under ${AP_INCLUDE_DIR}") message (STATUS "AP headers must lie under ${AP_INCLUDE_DIR}")
@ -144,6 +169,13 @@ if (ENABLE_XILINX)
endif () endif ()
if (ENABLE_TESTING) if (ENABLE_TESTING)
include (CTest)
if (CMAKE_VERSION VERSION_GREATER_EQUAL 3.19.0)
cmake_policy (SET CMP0110 NEW)
endif ()
if (NOT IS_GNU_LEGACY)
find_package (Catch2 REQUIRED) find_package (Catch2 REQUIRED)
add_library (catch_common_${PROJECT_NAME} OBJECT sources/tb/main_catch2.cpp) add_library (catch_common_${PROJECT_NAME} OBJECT sources/tb/main_catch2.cpp)
@ -152,16 +184,15 @@ if (ENABLE_TESTING)
add_executable (cordicabs_tb sources/tb/cordicabs_tb.cpp) add_executable (cordicabs_tb sources/tb/cordicabs_tb.cpp)
target_link_libraries (cordicabs_tb catch_common_${PROJECT_NAME} cordicabs) target_link_libraries (cordicabs_tb catch_common_${PROJECT_NAME} cordicabs)
include (CTest)
include (Catch) include (Catch)
catch_discover_tests (cordicabs_tb WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/data) catch_discover_tests (cordicabs_tb WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/data)
endif ()
if (ENABLE_XILINX) if (ENABLE_XILINX)
find_file (INPUT_DAT_TB input.dat HINTS data NO_CACHE REQUIRED) find_file (INPUT_DAT_TB input.dat HINTS data NO_CACHE REQUIRED)
if (CMAKE_VERSION VERSION_LESS 3.19.0) if (CMAKE_VERSION VERSION_LESS 3.19.0)
set (TEST_NAME "\"Xilinx C-Simulation Testbench CordicAbs\"") set (TEST_NAME "\"Xilinx C-Simulation Testbench CordicAbs\"")
else () else ()
cmake_policy (SET CMP0110 NEW)
set (TEST_NAME "Xilinx C-Simulation Testbench CordicAbs") set (TEST_NAME "Xilinx C-Simulation Testbench CordicAbs")
endif () endif ()
add_test (NAME ${TEST_NAME} COMMAND cordicabs_xilinx_tb ${INPUT_DAT_TB}) add_test (NAME ${TEST_NAME} COMMAND cordicabs_xilinx_tb ${INPUT_DAT_TB})
@ -169,7 +200,7 @@ if (ENABLE_TESTING)
if (XILINX_COSIM) if (XILINX_COSIM)
set ( set (
XILINX_TESTLINES XILINX_TESTLINES
"1000" "10000"
CACHE STRING "Number of co-simulation passes" CACHE STRING "Number of co-simulation passes"
) )
@ -179,38 +210,40 @@ if (ENABLE_TESTING)
"1" "1"
CACHE INTERNAL "EXPORT_IP" CACHE INTERNAL "EXPORT_IP"
) )
else ()
unset (EXPORT_IP CACHE)
endif ()
if (XILINX_IMPL) if (XILINX_IMPL)
set ( set (
RUN_IMPL RUN_IMPL
"1" "1"
CACHE INTERNAL "RUN_IMPL" CACHE INTERNAL "RUN_IMPL"
) )
endif () else ()
unset (RUN_IMPL CACHE)
endif () endif ()
add_custom_target ( add_custom_target (
run_hls run_hls
COMMAND ${XILINX_HLS} ${CMAKE_SOURCE_DIR}/hls_files/cordicabs_16_4_6/script_16_4_6.tcl COMMAND
${XILINX_HLS} ${CMAKE_CURRENT_SOURCE_DIR}/hls_files/cordicabs_16_4_6/script_16_4_6.tcl
${XILINX_TESTLINES} ${EXPORT_IP} ${RUN_IMPL} ${XILINX_TESTLINES} ${EXPORT_IP} ${RUN_IMPL}
WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}/hls_files/cordicabs_16_4_6 WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/hls_files/cordicabs_16_4_6
USES_TERMINAL USES_TERMINAL
) )
if (CMAKE_VERSION VERSION_LESS 3.19.0) if (CMAKE_VERSION VERSION_LESS 3.19.0)
add_test ( set (TEST_NAME "\"Xilinx HLS TCL Flow\"")
NAME "\"Xilinx HLS TCL Flow\""
COMMAND ${XILINX_HLS} ${CMAKE_SOURCE_DIR}/hls_files/cordicabs_16_4_6/script_16_4_6.tcl
${XILINX_TESTLINES} 0 0
WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}/hls_files/cordicabs_16_4_6
)
else () else ()
cmake_policy (SET CMP0110 NEW) set (TEST_NAME "Xilinx HLS TCL Flow")
add_test (
NAME "Xilinx HLS TCL Flow"
COMMAND ${XILINX_HLS} ${CMAKE_SOURCE_DIR}/hls_files/cordicabs_16_4_6/script_16_4_6.tcl
${XILINX_TESTLINES} 0 0
WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}/hls_files/cordicabs_16_4_6
)
endif () endif ()
add_test (
${TEST_NAME}
COMMAND
${XILINX_HLS} ${CMAKE_CURRENT_SOURCE_DIR}/hls_files/cordicabs_16_4_6/script_16_4_6.tcl
${XILINX_TESTLINES} 0 0
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/hls_files/cordicabs_16_4_6
)
set_property (TEST ${TEST_NAME} PROPERTY DISABLED TRUE)
endif () endif ()
endif () endif ()
endif () endif ()

View file

@ -16,7 +16,7 @@ if { [expr {$argc > 0}] } {
if { [expr {$argc > 1}] } { if { [expr {$argc > 1}] } {
set EXPORT_IP [lindex $argv 1] set EXPORT_IP [lindex $argv 1]
} else { } else {
set EXPORT_IP 1 set EXPORT_IP 0
} }
if { [expr {$argc > 2}] && $EXPORT_IP } { if { [expr {$argc > 2}] && $EXPORT_IP } {
@ -30,7 +30,7 @@ set XILINX_MAJOR [expr {int($VERSION)}]
if {[expr {$VERSION < 2020.1}]} { if {[expr {$VERSION < 2020.1}]} {
set CFLAGS "-std=c++0x -DXILINX_MAJOR=${XILINX_MAJOR} -Wno-unknown-pragmas -Wno-unused-label -Wall -DNDEBUG -I${ROOT_DIR}/sources" set CFLAGS "-std=c++0x -DXILINX_MAJOR=${XILINX_MAJOR} -Wno-unknown-pragmas -Wno-unused-label -Wall -DNDEBUG -I${ROOT_DIR}/sources"
} else { } else {
set CFLAGS "-std=c++14 -Wno-unknown-pragmas -Wno-unused-label -Wall -DNDEBUG -I${ROOT_DIR}/sources" set CFLAGS "-std=c++14 -DXILINX_MAJOR=${XILINX_MAJOR} -Wno-unknown-pragmas -Wno-unused-label -Wall -DNDEBUG -I${ROOT_DIR}/sources"
} }
set PROJECT_NAME "cordicabs_16_4_6" set PROJECT_NAME "cordicabs_16_4_6"
@ -43,75 +43,56 @@ add_files -cflags "$CFLAGS" "${ROOT_DIR}/sources/hls_abs/hls_abs.hpp"
add_files -cflags "$CFLAGS" "${ROOT_DIR}/sources/top_level/top_level_cordic.cpp" add_files -cflags "$CFLAGS" "${ROOT_DIR}/sources/top_level/top_level_cordic.cpp"
add_files -cflags "$CFLAGS" -tb "${ROOT_DIR}/sources/top_level/top_level_cordic_tb.cpp" add_files -cflags "$CFLAGS" -tb "${ROOT_DIR}/sources/top_level/top_level_cordic_tb.cpp"
if {[expr {$VERSION < 2020.1}]} {
open_solution -reset "solution_spartan7"
} else {
open_solution -reset "solution_spartan7" -flow_target vivado
}
set_part {xc7s100-fgga484-1}
create_clock -period 10 -name default
set_clock_uncertainty 2
set_directive_pipeline cordic_abs_16_4_6
set_directive_interface cordic_abs_16_4_6 -mode ap_ctrl_none
csim_design -argv "${ROOT_DIR}/data/input.dat" -clean -O
csynth_design
cosim_design -O -argv "${ROOT_DIR}/data/input.dat ${NLINES}"
if { $EXPORT_IP } { set targets [ dict create spartan7 {xc7s100-fgga484-1} genesys2 {xc7k325tffg900-2} ]
foreach target { spartan7 genesys2 } {
if {[expr {$VERSION < 2020.1}]} {
open_solution -reset "solution_${target}"
} else {
open_solution -reset "solution_${target}" -flow_target vivado
}
set_part [ dict get $targets $target ]
create_clock -period 10 -name default
set_clock_uncertainty 2
set_directive_pipeline cordic_abs_16_4_6
set_directive_interface cordic_abs_16_4_6 -mode ap_ctrl_none
csim_design -argv "${ROOT_DIR}/data/input.dat" -clean -O
csynth_design
cosim_design -O -argv "${ROOT_DIR}/data/input.dat ${NLINES}"
config_export -format ip_catalog \ config_export -format ip_catalog \
-display_name "${PROJECT_NAME}" \ -display_name "${PROJECT_NAME}" \
-ipname "${PROJECT_NAME}_spartan7" \ -ipname "${PROJECT_NAME}_${target}" \
-version "0.1.${XILINX_MAJOR}" -version "0.1.${XILINX_MAJOR}" \
if { [expr {$VERSION >= 2020.1}] } { -vivado_optimization_level 2 \
config_export -output "${ROOT_DIR}/hls_files/cordicabs_16_4_6/ip/${XILINX_MAJOR}_spartan7" -vivado_phys_opt route
if { $EXPORT_IP } {
if [ expr {! [ file isdirectory "${ROOT_DIR}/ip" ] } ] {
if { [ file exists "${ROOT_DIR}/ip" ] } {
file remove "${ROOT_DIR}/ip"
} }
if { $RUN_IMPL } { file mkdir "${ROOT_DIR}/ip"
export_design -flow impl }
if { [expr {$VERSION >= 2020.1}] } {
export_design -output "${ROOT_DIR}/hls_files/cordicabs_16_4_6/ip/${XILINX_MAJOR}_${target}"
} else { } else {
export_design export_design
set IP_FILE [glob -directory "${SCRIPT_DIR}/${PROJECT_NAME}/solution_${target}/impl/ip" *.zip]
file copy -force "${IP_FILE}" "${ROOT_DIR}/hls_files/cordicabs_16_4_6/ip/${XILINX_MAJOR}_${target}.zip"
} }
if { [expr {$VERSION < 2020.1}] } {
set IP_FILE [glob -directory "${SCRIPT_DIR}/${PROJECT_NAME}/solution_spartan7/impl/ip" *.zip]
file copy -force "${IP_FILE}" "${ROOT_DIR}/hls_files/cordicabs_16_4_6/ip/${XILINX_MAJOR}_spartan7.zip"
} }
}
close_solution
if {[expr {$VERSION < 2020.1}]} {
open_solution -reset "solution_genesys2"
} else {
open_solution -reset "solution_genesys2" -flow_target vivado
}
set_part {xc7k325tffg900-2}
create_clock -period 10 -name default
set_clock_uncertainty 2
set_directive_pipeline cordic_abs_16_4_6
set_directive_interface cordic_abs_16_4_6 -mode ap_ctrl_none
csim_design -argv "${ROOT_DIR}/data/input.dat" -clean -O
csynth_design
cosim_design -O -argv "${ROOT_DIR}/data/input.dat ${NLINES}"
if { $EXPORT_IP } {
config_export -format ip_catalog \
-display_name "${PROJECT_NAME}" \
-ipname "${PROJECT_NAME}_genesys2" \
-version "0.1.${XILINX_MAJOR}"
if { [expr {$VERSION >= 2020.1}] } {
config_export -output "${ROOT_DIR}/hls_files/cordicabs_16_4_6/ip/${XILINX_MAJOR}_genesys2"
}
if { $RUN_IMPL } { if { $RUN_IMPL } {
export_design -flow impl export_design -flow impl
} else {
export_design
}
if { [expr {$VERSION < 2020.1}] } {
set IP_FILE [glob -directory "${SCRIPT_DIR}/${PROJECT_NAME}/solution_genesys2/impl/ip" *.zip]
file copy -force "${IP_FILE}" "${ROOT_DIR}/hls_files/cordicabs_16_4_6/ip/${XILINX_MAJOR}_genesys2.zip"
} }
close_solution
} }
close_solution
close_project close_project
exit 0 exit 0

View file

@ -37,20 +37,36 @@
#define cst_abs(x) (x > 0 ? x : -x) #define cst_abs(x) (x > 0 ? x : -x)
#if __cplusplus < 201402L && XILINX_MAJOR <= 2019
#ifndef kn_values
const double kn_values_define[7] = {
0.70710678118655, 0.632455532033680, 0.613571991077900,
0.608833912517750, 0.607648256256170, 0.607351770141300, 0.607277644093530};
#define kn_values kn_values_define
#define kn_i unsigned(kn_values[Tnb_stages - 1] * double(1U << 4))
#endif
#define OWN_CONSTEXPR
#else
#define OWN_CONSTEXPR constexpr
#endif
template <unsigned TIn_W, unsigned TIn_I, unsigned Tnb_stages> template <unsigned TIn_W, unsigned TIn_I, unsigned Tnb_stages>
class CCordicAbs { class CCordicAbs {
public: public:
#if __cplusplus >= 201402L || XILINX_MAJOR > 2019
static constexpr double kn_values[7] = { static constexpr double kn_values[7] = {
0.70710678118655, 0.632455532033680, 0.613571991077900, 0.70710678118655, 0.632455532033680, 0.613571991077900,
0.608833912517750, 0.607648256256170, 0.607351770141300, 0.607277644093530}; 0.608833912517750, 0.607648256256170, 0.607351770141300, 0.607277644093530};
static constexpr const unsigned In_W = TIn_W; static constexpr unsigned kn_i = unsigned(kn_values[Tnb_stages - 1] * double(1U << 4)); // 4 bits are enough
static constexpr const unsigned In_I = TIn_I; #endif
static constexpr const unsigned Out_W = In_W + 2; static constexpr unsigned In_W = TIn_W;
static constexpr const unsigned Out_I = In_I + 2; static constexpr unsigned In_I = TIn_I;
static constexpr const unsigned nb_stages = Tnb_stages; static constexpr unsigned Out_W = In_W + 2;
static constexpr unsigned Out_I = In_I + 2;
static constexpr unsigned nb_stages = Tnb_stages;
static constexpr unsigned kn_i = unsigned(kn_values[nb_stages - 1] * double(1U << 4)); // 4 bits are enough
static constexpr unsigned in_scale_factor = unsigned(1U << (In_W - In_I)); static constexpr unsigned in_scale_factor = unsigned(1U << (In_W - In_I));
static constexpr unsigned out_scale_factor = unsigned(1U << (Out_W - Out_I)); static constexpr unsigned out_scale_factor = unsigned(1U << (Out_W - Out_I));
@ -66,8 +82,7 @@ public:
return ap_uint<Out_W>(ap_uint<Out_W + 4>(in * ap_uint<4>(kn_i)) >> 4U); return ap_uint<Out_W>(ap_uint<Out_W + 4>(in * ap_uint<4>(kn_i)) >> 4U);
} }
#if !defined(XILINX_MAJOR) || XILINX_MAJOR >= 2020 static OWN_CONSTEXPR ap_uint<Out_W> process(ap_int<In_W> re_in, ap_int<In_W> im_in) {
static constexpr ap_uint<Out_W> process(ap_int<In_W> re_in, ap_int<In_W> im_in) {
ap_int<Out_W> A[nb_stages + 1]; ap_int<Out_W> A[nb_stages + 1];
ap_int<Out_W> B[nb_stages + 1]; ap_int<Out_W> B[nb_stages + 1];
@ -93,9 +108,8 @@ public:
return ap_uint<Out_W>(A[nb_stages]); return ap_uint<Out_W>(A[nb_stages]);
} }
#endif
#if !defined(__SYNTHESIS__) && defined(SOFTWARE) #if !defined(__SYNTHESIS__) && defined(SOFTWARE) && __cplusplus >= 201402L
static constexpr uint64_t process(int64_t re_in, int64_t im_in) { static constexpr uint64_t process(int64_t re_in, int64_t im_in) {
const int64_t re_x = re_in; const int64_t re_x = re_in;

View file

@ -19,67 +19,17 @@
#include "top_level_cordic.hpp" #include "top_level_cordic.hpp"
#if !defined(XILINX_MAJOR) || XILINX_MAJOR >= 2020
void cordic_abs_16_4_6( void cordic_abs_16_4_6(
ap_int<cordic_abs_t::In_W> re_in, ap_int<cordic_abs_t::In_W> re_in,
ap_int<cordic_abs_t::In_W> im_in, ap_int<cordic_abs_t::In_W> im_in,
ap_uint<cordic_abs_t::Out_W> & module_out) { ap_uint<cordic_abs_t::Out_W> & module_out) {
static constexpr const cordic_abs_t cordic_abs {}; // static constexpr const cordic_abs_t cordic_abs {};
const ap_int<cordic_abs_t::In_W> x = re_in; const ap_int<cordic_abs_t::In_W> x = re_in;
const ap_int<cordic_abs_t::In_W> y = im_in; const ap_int<cordic_abs_t::In_W> y = im_in;
const ap_uint<cordic_abs_t::Out_W> m = cordic_abs.process(x, y); const ap_uint<cordic_abs_t::Out_W> m = cordic_abs_t::process(x, y);
module_out = m; module_out = m;
} }
#else
constexpr unsigned In_W = cordic_abs_t::In_W;
constexpr unsigned Out_W = cordic_abs_t::Out_W;
constexpr unsigned nb_stages = cordic_abs_t::nb_stages;
static ap_uint<Out_W> process(ap_int<In_W> re_in, ap_int<In_W> im_in) {
ap_int<Out_W> A[nb_stages + 1];
ap_int<Out_W> B[nb_stages + 1];
A[0] = hls_abs<false>::abs(re_in);
B[0] = hls_abs<false>::abs(im_in);
for (uint16_t u = 0; u < nb_stages; u++) {
const bool sign_B = B[u] > 0;
const ap_int<Out_W> step_A = B[u] >> u;
const ap_int<Out_W> step_B = A[u] >> u;
const ap_int<Out_W> tmp_B = sign_B
? ap_int<Out_W>(B[u] - step_B)
: ap_int<Out_W>(B[u] + step_B);
const ap_int<Out_W> tmp_A = sign_B
? ap_int<Out_W>(A[u] + step_A)
: ap_int<Out_W>(A[u] - step_A);
A[u + 1] = tmp_A;
B[u + 1] = tmp_B;
}
return ap_uint<Out_W>(A[nb_stages]);
}
void cordic_abs_16_4_6(
ap_int<cordic_abs_t::In_W> re_in,
ap_int<cordic_abs_t::In_W> im_in,
ap_uint<cordic_abs_t::Out_W> & module_out) {
const ap_int<cordic_abs_t::In_W> x = re_in;
const ap_int<cordic_abs_t::In_W> y = im_in;
const ap_uint<cordic_abs_t::Out_W> m = process(x, y);
module_out = m;
}
#endif

View file

@ -44,10 +44,10 @@ int main(int argc, char ** argv) {
input_fn = string(argv[1]); input_fn = string(argv[1]);
} }
constexpr unsigned max_lines = 10000; constexpr unsigned max_lines = 100000;
unsigned n_lines = max_lines; unsigned n_lines = max_lines;
if (argc > 2) { if (argc > 2) {
n_lines = unsigned(std::stoi(string(argv[2]))); n_lines = std::min(unsigned(std::stoi(string(argv[2]))), max_lines);
} }
ap_int<cordic_abs_t::In_W> re_values_in[max_lines]; ap_int<cordic_abs_t::In_W> re_values_in[max_lines];
@ -57,6 +57,10 @@ int main(int argc, char ** argv) {
double results[max_lines]; double results[max_lines];
FILE * INPUT = fopen(input_fn.c_str(), "r"); FILE * INPUT = fopen(input_fn.c_str(), "r");
if (!bool(INPUT)) {
perror("Can't open input file");
exit(EXIT_FAILURE);
}
// Init test vector // Init test vector
for (unsigned i = 0; i < n_lines; i++) { for (unsigned i = 0; i < n_lines; i++) {
@ -73,7 +77,7 @@ int main(int argc, char ** argv) {
fclose(INPUT); fclose(INPUT);
// Save the results to a file // Save the results to a file
// ofstream outfile("results.dat"); ofstream outfile("results.dat");
constexpr double abs_margin = double(1 << (cordic_abs_t::Out_I - 1)) * 2. / 100.; constexpr double abs_margin = double(1 << (cordic_abs_t::Out_I - 1)) * 2. / 100.;
@ -89,10 +93,10 @@ int main(int argc, char ** argv) {
// cout << "Series " << iter; // cout << "Series " << iter;
// cout << " Outcome: "; // cout << " Outcome: ";
// outfile << re_values_in[iter].to_double() / cordic_abs_t::in_scale_factor << " " outfile << re_values_in[iter].to_double() / cordic_abs_t::in_scale_factor << " "
// << im_values_in[iter].to_double() / cordic_abs_t::in_scale_factor << " " << im_values_in[iter].to_double() / cordic_abs_t::in_scale_factor << " "
// << cordic_abs_t::scale_cordic(values_out[iter].to_double()) / cordic_abs_t::out_scale_factor << " " << cordic_abs_t::scale_cordic(values_out[iter].to_double()) / cordic_abs_t::out_scale_factor << " "
// << results[iter] << std::endl; << results[iter] << std::endl;
const double dbl_res = cordic_abs_t::scale_cordic(values_out[iter].to_double()) / cordic_abs_t::out_scale_factor; const double dbl_res = cordic_abs_t::scale_cordic(values_out[iter].to_double()) / cordic_abs_t::out_scale_factor;
@ -105,7 +109,7 @@ int main(int argc, char ** argv) {
} }
} }
} }
// outfile.close(); outfile.close();
printf("RESULT: %s!\n", counted_errors == 0 ? "SUCCESS" : "FAILURE"); printf("RESULT: %s!\n", counted_errors == 0 ? "SUCCESS" : "FAILURE");